Particularly, in non-volatile memories which have single-ended bit lines, sensing of data is desirably achieved with the assistance of internal clock generators. The speed with which sensing of data can occur varies significantly with variations in processing. In a typical manufacturing operation, the process which is used to manufacture the non-volatile memory does vary somewhat. Of course it is desirable to have as little variation as possible. There is, however, some variation which cannot reliably be prevented. Consequently, it is desirable to have devices which are functional over some range of process variation. Typical variations relate to doping concentrations, feature dimensions, and mask to mask alignment. These variations result in many different variations in device characteristics such as capacitance, transistor gain, resistance, and transistor threshold voltage.
The rate with which data can be sensed is in the critical path in determining access time of the particular memory. In the case in which a sense amplifier is clocked by a timing signal in some fashion, it is necessary that the timing signal occur at the proper time. If the timing signal is too soon, the sensing may be unreliable or too slow, or the sensing may cause other deleterious effects such as using too much power or providing premature output switching which is spurious. If the timing signal is too late, there is then an unnecessary time penalty which causes the access time to be longer than it needs to be. The timing signal is thus constrained by needing to be long enough to achieve its intended purpose or purposes and short enough to take full advantage of the speed which the actual sensing occurs. There have been attempts to match the timing signal with the sensing operation which would compensate for some process variations. One example is described in "A Programmable 80 ns 1 Mb CMOS EPROM," Saito et al, pages 176-177, DIGEST OF TECHNICAL PAPERS, 1985 IEEE International Solid-State Circuits Conference which describes a word line which is used to match sensing delays related to word lines. There are other delays, however, that do not follow the same characteristic as the word line so that these delays are not matched over process variations by the word line. One example is bit line capacitance. Bit line capacitance also varies with voltage which is not matched in the word line.